Abstract:

 This paper deals with the digital background calibration technique of analog- to- digital converter (ADC) and presents a new algorithm applied to the high- speed and high- resolution 2.5- b/stage pipelined ADC.In this algorithm,signal- dependent dither signals are injected into the 2.5- b/stage flip- over multiplying DAC (MDAC) to measure the nonlinear errors resulting from capacitor mismatch and finite opamp gain in MDAC and feed back the errors to the digital outputs of pipelined ADC for correction.This calibration algorithm is easy to realize and can works at very high speed without interrupting the normal operation of high- resolution ADC.Moreover,it can effectively calibrate all gain errors resulting from capacitor mismatch,finite opamp gain and other sources.Behavior simulation results show that,by using the proposed calibration scheme,the signal- to- noise distortion ratio increases from 63.3dB to 78.7dB and the spurious- free dynamic range improves from 63.9dB to 91.8dB.

Key words: pipelined analog- to- digital converter, calibration, dither signal, capacitor mismatch, amplifier, finitegain