Journal of South China University of Technology (Natural Science Edition) ›› 2005, Vol. 33 ›› Issue (6): 28-31.

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Delay Simulation and Analysis in the Design of Complicated Programmable Logic Devices

Chen Shuai  Zhong Xian-xin  Shao Xiao-liang   

  1. Key Lab for Optoelectronic Technology and System,the Ministry of Education,Chongqing Univ.,Chongqing 400044,China
  • Received:2004-07-09 Online:2005-06-25 Published:2005-06-25
  • Contact: 陈帅(1969-),男,在职博士生,淮南师范学院讲师,主要从事嵌入式智能测控系统、EDA与SOPC技术、信息处理与网络技术方面的研究 E-mail:ehen232001@126.com
  • About author:陈帅(1969-),男,在职博士生,淮南师范学院讲师,主要从事嵌入式智能测控系统、EDA与SOPC技术、信息处理与网络技术方面的研究
  • Supported by:

    国家重点基础研究发展规划项目(G1999033105);重庆市科技计划项目(8673);安徽省高等学校自然科学基金资助项目(2005KJ092);淮南师范学院青年教师自然科学基金资助项目(2004LKQO1)

Abstract:

In order to investigate the effect of the delay performance of complicated programmable logic devices on the delay in the digital system design,the mathematical model of the digital logic delay unit core was studied,the basic digital logic delay unit core was realized in hard description language and with graphics,and a multi-delay unit was put forward via the digital cote multiplex from the basic digital core.Moreover,with the help of the elec-tronic design automation software,digital delay components in different complicated programmable logic devices were simulated and analyzed.The results indicate that the delay in the digital logic design is related to three fac-tots,namely,the delay performance of the complicated programmable logic device,the selecting logic block in the placement and the routing,and the interlinking sources.Thus,theoretical and experimental foundations for the de-sign and analysis of the delay in complicated programmable logic systems were laid.

Key words: complicated programmable logic device, complicated digital logic design, delay unit core, simulation, analysis