关键词: CORDIC 算法, 指数函数, 区间压缩, 收敛域, 迭代结构优化, 现场可编程门阵列

Abstract: Although CORDIC algorithm has been widely used in various transcendental functions,its general itera- tive algorithm is inefficient in using FPGA (Field Programmable Gate Array) to solve the exponential function in a wide-range domain.In order to solve this problem,an FPGA fixed-point technology,which expands the conver- gence region and optimizes the iteration structure to implement CORDIC algorithm solver,is designed.In the inves- tigation,firstly,range compression method is employed to realize the convergence domain expansion of exponential function achieved by CORDIC algorithm.Secondly,the iteration structure of CORDIC algorithm is optimized.Then,the exponential function achieved by CORDIC algorithm is analyzed in a simulative way and implemented in FPGA.Finally,a 15-grade pipeline structure as well as a hyperbolic method is used to implement the expansion in convergence domain of CORDIC algorithm.Simulated and experimental results show that,in comparison with the general CORDIC algorithm,the proposed algorithm saves about 1/3 hardware resources,uses only two DSP multi- plexer units,expands the convergence domain from［－1.1182,1.1182］to［－6,6］,and achieves a relative er- ror low to 10^-3 .

Key words: CORDIC algorithm, exponential function, range compression, convergence region, iteration structure optimization, field programmable gate array