Journal of South China University of Technology (Natural Science Edition) ›› 2011, Vol. 39 ›› Issue (3): 135-139.doi: 10.3969/j.issn.1000-565X.2011.03.026

• Electronics, Communication & Automation Technology • Previous Articles     Next Articles

Effect of Via Microstructure on Cu/low-k Stress-Induced Voiding

Lin Xiao-ling1  Hou Tong-xian2  Zhang Xiao-wen1  Yao Ruo-he1   

  1. 1．Institute of Microelectronics,School of Electronic and Information Engineering,South China University of Technology,Guangzhou 510640,Guangdong,China;2.National Key Laboratory for ReliabilityPhysics and Application Technology of Electric Product.the Fifth Electronics Research Institute ofMinistry of Industry and Inform ation Technology,Guangzhou 510640,Guangdong,China
  • Received:2010-05-05 Revised:2010-06-27 Online:2011-03-25 Published:2011-02-01
  • Contact: 林晓玲(1978-)，女，在职博士生，工业和信息化部电子第五研究所电子元器件可靠性物理及其应用技术国家级重点实验室工程师，主要从事Ic失效分析技术、微电子可靠性物理等的研究． E-mail:lin_x_1@163.com
  • About author:林晓玲(1978-)，女，在职博士生，工业和信息化部电子第五研究所电子元器件可靠性物理及其应用技术国家级重点实验室工程师，主要从事Ic失效分析技术、微电子可靠性物理等的研究．
  • Supported by:

    电子元器件可靠性物理及其应用技术国家重点实验室基金资助项目(9140C0301040801)

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Abstract:

Based on the kinematic hardening model of copper,the Cu stress in different Cu/low-k via microstructures are modeled and analyzed via the finite element method to explore the changes of via height,via gouging depth and barrier layer thickness at the via bottom due to the process variation of interconnected via and via barrier layer.Then,the corresponding interconnected via and bottom interconnection stress-induced voiding（SIV） varying with the changes are analyzed.The results indicate that the via microstructure effect of Cu/low-k interconnection is a dominated factor affecting the interconnection stress and the SIV,that the via with high aspect ratio is more susceptible to SIV due to height variation,that the via gouging with suitable depth effectively improves the reliability of stress migration,and that the interconnection SIV performance and the thickness of barrier layer at the via bottom should be compromised because there exists contradiction between the two factors.

Key words: Cu/low-k interconnect, stress-induced voiding, process variation, via microstructure