Journal of South China University of Technology(Natural Science Edition) ›› 2012, Vol. 40 ›› Issue (6): 48-55.

• Electronics, Communication & Automation Technology • Previous Articles     Next Articles

Real-Time Sorting Algorithm of Spike Potentials Based on Probabilistic Neural Network

Zhu Xiao-pingHan Ye-qiangHao Yao-yaoWang DongChen Yao-wu1   

  1. 1. College of Biomedical Engineering and Instrument Science,Zhejiang University,Hangzhou 310027,Zhejiang,China;
    2. Qiushi Academy for Advanced Studies,Zhejiang University,Hangzhou 310027,Zhejiang,China
  • Received:2011-12-30 Revised:2012-02-28 Online:2012-06-25 Published:2012-05-03
  • Contact: 陈耀武(1963-) ,男,教授,博士生导师,从事智能技术与嵌入式系统、脑- 机接口信号处理与并行系统的研究.E-mail: cyw@mail.bme.zju.edu.cn E-mail:zxp@ zju.edu.cn
  • About author:祝晓平(1982-) ,男,博士生,主要从事并行计算和并行系统研究.
  • Supported by:

    国家自然科学基金资助项目( 61001172) ; 浙江省自然科学基金资助项目( Y2090707) ; 浙江大学中央高校基本科研业务费专项资金资助项目( 2010QNA5026)

Abstract:

In order to develop a portable brain-machine interface ( BMI) for practical real-time applications,a realtime sorting algorithm of spike potentials based on the probabilistic neural network ( PNN) is proposed and is implemented on the FPGA ( Field Programmable Gate Array) . In this algorithm,the network is trained via the quick loading of training data,and the spike potentials are sorted out through the trained network. In the FPGA architecture,a floating-point multiply-add operation is implemented by a on-chip DSP48Es; the calculation of vector distance is accelerated by adopting a pipelined parallel architecture; and the lookup table as well as the CORDIC ( Coordinate Rotation Digital Computer) method is employed to achieve an accurate approximation of the PNN activation function. Experimental results show that the FPGA-based implementation of PNN runs 47.43 times faster than the Matlab-based one with the same accuracy being up to 93.82%,which means that the portability and the real-time processing of BMI are successfully realized.

Key words: brain-machine interface, spike potential, sorting algorithm, neural network, field programmable gate array