Journal of South China University of Technology (Natural Science Edition) ›› 2006, Vol. 34 ›› Issue (1): 38-42.

• Electronics, Communication & Automation Technology • Previous Articles     Next Articles

An IP Simulation and Verification Platform Based on FPGA

Zheng Xue-ren  Deng Wan-ling  Fan Jian-ming  Chen Ling-ring  Chen Guo-hui  Lin Xiao-wei   

  1. College of Physical Science and Technology,South China Univ.of Tech.,Guangzhou 510640,Guangdong,China
  • Received:2004-09-17 Online:2006-01-25 Published:2006-01-25
  • Contact: Zheng Xue-ren(born in 1946)，male，profes-SOl，Ph．D．tutor，mainly researches on ASIC design，designmethodology and simulation E-mail:phxrzhen@scut.edu.an
  • About author:Zheng Xue-ren(born in 1946)，male，profes-SOl，Ph．D．tutor，mainly researches on ASIC design，designmethodology and simulation
  • Supported by:

    Supported by the key Research Grant from the Science＆ Technology Committee of Guangdong Province (123B29630)

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Abstract:

The simulation and hardware verification of IP(Intellectu',d Property)is an indispensable step in IP development.In this paper,an IP simulation and verification platform is developed based on FPGA(Field Pro-grammable Gate Array),and PCI(Peripheral Component Interconnect)bus is used to test IP cores.Thus,a target IP inserted into the platform can be easily tested,The proposed platform is then simulated to verify the functions,and is debugged in a PCI add-on card with Xilinx Spartan-3 600E FPGA.The results show that．on the proposed FPGA-based IP simulation and verification platform,IP can be effectively simulated and verified with good stability,which illustrates the practicability of the platform.

Key words: Field Programmable Gate Aray, Intellectual Properey, simulation, verification, Peripheral Com ponent Interconnect