华南理工大学学报(自然科学版) ›› 2016, Vol. 44 ›› Issue (5): 36-41,47.doi: 10.3969/j.issn.1000-565X.2016.05.006

• 电子、通信与自动控制 • 上一篇    下一篇

3D 叠层封装集成电路的缺陷定位方法

林晓玲1 恩云飞1 姚若河2†   

  1. 1. 工业和信息化部电子第五研究所 电子元器件可靠性物理及其应用技术重点实验室,广东 广州 510610; 2. 华南理工大学 电子与信息学院,广东 广州 510640
  • 收稿日期:2015-07-22 修回日期:2015-10-20 出版日期:2016-05-25 发布日期:2016-04-12
  • 通信作者: 姚若河(1961-),男,教授,博士生导师,主要从事集成电路系统设计、半导体物理及器件研究. E-mail:phrhyao@scut.edu.cn
  • 作者简介:林晓玲(1978-),女,博士,高级工程师,主要从事微电子可靠性物理、IC 失效分析技术研究. E-mail:lin_x_l@ 163. com
  • 基金资助:
     广东省自然科学基金资助项目(2014A030313656)

Defect Localization Method of 3D Stacked-Die Packaged Integrated Circuits

LIN Xiao-ling1 EN Yun-fei1 YAO Ruo-he2   

  1. 1.Science and Technology on Reliability Physics and Application of Electronic Component Laboratory,The Fifth Electronics Research Institute of the Ministry of Industry and Information Technology,Guangzhou 510610,Guangdong,China; 2.School of Electronic and Information Engineering,South China University of Technology,Guangzhou 510640,Guangdong,China
  • Received:2015-07-22 Revised:2015-10-20 Online:2016-05-25 Published:2016-04-12
  • Contact: 姚若河(1961-),男,教授,博士生导师,主要从事集成电路系统设计、半导体物理及器件研究. E-mail:phrhyao@scut.edu.cn
  • About author:林晓玲(1978-),女,博士,高级工程师,主要从事微电子可靠性物理、IC 失效分析技术研究. E-mail:lin_x_l@ 163. com
  • Supported by:
    Supported by the Natural Science Foundation of Guangdong Province(2014A030313656)

摘要: 三维(3D)叠层封装集成电路是高性能器件的一种重要封装形式,其独特的封装形式为失效定位带来了新的挑战. 文中融合实时锁定热成像和 X 射线探测技术,提出了一种 3D 叠层封装集成电路缺陷定位方法. 该方法首先利用 X 射线探测技术从器件的正面、侧面获取电路内部结构并成像,进而确定芯片的装配位置及面积、芯片叠层层数、引线键合方式;然后利用锁定热成像技术获得缺陷在封装内部传播的延迟信息及在封装内部xy 平面上的信息,通过计算不同频率下的相移来确定叠层封装中缺陷在 z 轴方向的位置信息. 对某型号塑料封装存储器 SDRAM 中缺陷的定位及对缺陷部位的物理分析表明,锁定热成像与 X 射线探测技术相结合,可以在不开封的前提下进行 3D 叠层封装集成电路内部缺陷的定位.

关键词: 三维叠层封装, 集成电路, 缺陷定位, 失效分析

Abstract: Three-dimension (3D) stacked-die package is one of the important package types of high-performance devices.Its unique packaging brings new challenges to defect localization.In this paper,a localization method of defects inside 3D stacked-die packaged integrated circuits,which integrates both lock-in thermography imaging and X-ray detection technology,is proposed.Firstly,X-ray detection technology is used to obtain internal structure of the device horizontally and vertically,and thus the chip location and size,the stack layers and the wire bonding mode inside the package can be determined.Secondly,the propagation delay information of defects inside package and the defect location on xy plane are obtained via lock-in thermography imaging.Then,more exact location in- formation of the defect in z direction is obtained by calculating the phase shift at different frequencies.Finally,some experiments are carried out to discover the localization of defects inside a plastic packaging SDRAM,and the corresponding physical analysis is made.The results show that the integration of lock-in thermography imaging with X-ray detection technology helps localize defects of 3D stacked-die packaged devices without decapping the device.

Key words: 3D stacked-die package, integrated circuit, defect localization, failure analysis

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