A differential delay cell with noise cancellation structure was proposed in order to reduce the phase noise of ring oscillators． The delay cell consists of main path，auxiliary path and active feedback． The main noise source of the delay cell can produce fully correlated in-phase noise voltages at the differential outputs． When the noise cancellation condition is met，the noise voltages can be cancelled，thus the noise voltage at the differential outputs is reduced． The delay cell provides an additional phase shift by introducing a mirror pole，which can be employed in a general architecture of a two-stage differential ring oscillator with quadrature output，effectively reducing the clock jitter and the phase noise of the ring oscillator． The proposed ring oscillator was designed and simulated with 0. 18 μm TSMC CMOS technology under 1. 8 V． The results show that the center frequency of the oscillator is 800 MHz and the phase noise is －117. 5 dBc/Hz at 1 MHz offset，which is only 1. 01 dBc/Hz from the theoretical calculation result．