本文设计了一款用于无线通信射频链路的新型射频功率放大器芯片。提出了基于双通道折叠式比例串联变压器拓扑的功率合成结构，与传统非折叠对称分布功率合成结构相比，拓展了输出功率调整范围，尤其是该结构所引入的交叉耦合系数增强了变压器初次级的耦合，最终获得能量传递效率的显著改善。芯片采用0.18 μm RF CMOS工艺实现，对应工作频率为2.4 GHz。测试结果表明：在2.5 V的供电电压下，高输出功率模式时，饱和输出功率和最大线性输出功率分别为28.3 dBm 和27.2 dBm，对应的功率附加效率分别为33.5% 和31.6%；低输出功率模式时，最大线性输出功率为19.8 dBm，对应的功率附加效率为24.1%。芯片性能良好，可以满足高效、高密度及多制式无线通信射频链路应用要求。

In order to improve the power-added efficiency (PAE) without increasing chip size，a novel power amplifier (PA) with folded proportional series combining transformer used for wireless radio frequency (ＲF) is presented． Due to the cross coupling coefficient introduced by the folded structure，the primary to secondary winding electromagnetic coupling is enhanced，thus the power delivery efficiency is improved． Using the proposed folded proportional combining structure，the power amplifier is designed and implemented in standard 0. 18 μm CMOS process at the operating frequency of 2. 4 GHz． The measurement results show that，with a 2. 5 V power supply， the PA can achieve a peak output power of 28. 3dBm and a maximum linear output power (P1-dB) of 27. 2dBm in high power mode，with PAE of 33. 5% and 31. 6%，respectively，and a P1-dB of 19. 8dBm with PAE of 24. 1% in low power mode． It is demonstrated that the proposed design is suitable for the complicated wireless system with high efficiency and multi modulation requirements．