关键词: 脑－机接口, 锋电位, 分类算法, 神经网络, 现场可编程门阵列

Abstract:

In order to develop a portable brain-machine interface ( BMI) for practical real-time applications,a realtime sorting algorithm of spike potentials based on the probabilistic neural network ( PNN) is proposed and is implemented on the FPGA ( Field Programmable Gate Array) . In this algorithm,the network is trained via the quick loading of training data,and the spike potentials are sorted out through the trained network. In the FPGA architecture,a floating-point multiply-add operation is implemented by a on-chip DSP48Es; the calculation of vector distance is accelerated by adopting a pipelined parallel architecture; and the lookup table as well as the CORDIC ( Coordinate Rotation Digital Computer) method is employed to achieve an accurate approximation of the PNN activation function. Experimental results show that the FPGA-based implementation of PNN runs 47.43 times faster than the Matlab-based one with the same accuracy being up to 93.82%,which means that the portability and the real-time processing of BMI are successfully realized.

Key words: brain-machine interface, spike potential, sorting algorithm, neural network, field programmable gate array