华南理工大学学报(自然科学版) ›› 2020, Vol. 48 ›› Issue (5): 67-74.doi: 10.12141/j.issn.1000-565X.190673

• 电子、通信与自动控制 • 上一篇    下一篇

一种新型环形振荡器结构

姚若河 王晓婷   

  1. 华南理工大学 电子与信息学院,广东 广州 510640
  • 收稿日期:2019-09-30 修回日期:2019-12-19 出版日期:2020-05-25 发布日期:2020-05-01
  • 通信作者: 姚若河(1961-),男,教授,博士生导师,主要从事集成电路系统设计、半导体物理及器件研究。 E-mail:phrhyao@scut.edu.cn
  • 作者简介:姚若河(1961-),男,教授,博士生导师,主要从事集成电路系统设计、半导体物理及器件研究。
  • 基金资助:
    广东省重大科技专项项目 (2019B010143003)

A New Kind of Ring Oscillator Structure

YAO Ruohe WANG Xiaoting   

  1. School of Electronic and Information Engineering,South China University of Technology,Guangzhou 510640,Guangdong,China
  • Received:2019-09-30 Revised:2019-12-19 Online:2020-05-25 Published:2020-05-01
  • Contact: 姚若河(1961-),男,教授,博士生导师,主要从事集成电路系统设计、半导体物理及器件研究。 E-mail:phrhyao@scut.edu.cn
  • About author:姚若河(1961-),男,教授,博士生导师,主要从事集成电路系统设计、半导体物理及器件研究。
  • Supported by:
    Supported by the Major Science and Technology Project of Guangdong Province (2019B010143003)

摘要: 为了减小环形振荡器的相位噪声,提出一种具有噪声消除结构的差分延迟单元。该延迟单元由主路径、辅助路径以及有源反馈构成,其主要噪声源在差分输出端形成相位相同的噪声电压。当满足噪声消除条件时,其噪声电压相互抵消,从而减小差分输出端的噪声电压。该延迟单元通过引入一个镜像极点,提供额外的相移,使由该延迟单元构成正交输出的环形振荡器仅需两级,减少了延迟单元的级数,有效降低环形振荡器的时钟抖动并减小相位噪声。采用 TSMC 0. 18 μm 标准 CMOS 工艺进行设计和仿真,电源电压为 1.8V,结果表明: 振荡器的中心频率为 800MHz,在偏移中心频率 1MHz 处的相位噪声为-117. 5dBc/Hz,与理论计算结果仅差 1.01dBc/Hz。

关键词: 噪声消除, 相位噪声, 差分延迟单元, 环形振荡器

Abstract: A differential delay cell with noise cancellation structure was proposed in order to reduce the phase noise of ring oscillators. The delay cell consists of main path,auxiliary path and active feedback. The main noise source of the delay cell can produce fully correlated in-phase noise voltages at the differential outputs. When the noise cancellation condition is met,the noise voltages can be cancelled,thus the noise voltage at the differential outputs is reduced. The delay cell provides an additional phase shift by introducing a mirror pole,which can be employed in a general architecture of a two-stage differential ring oscillator with quadrature output,effectively reducing the clock jitter and the phase noise of the ring oscillator. The proposed ring oscillator was designed and simulated with 0. 18 μm TSMC CMOS technology under 1. 8 V. The results show that the center frequency of the oscillator is 800 MHz and the phase noise is -117. 5 dBc/Hz at 1 MHz offset,which is only 1. 01 dBc/Hz from the theoretical calculation result.

Key words: noise cancellation, phase noise, differential delay cell, ring oscillator

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